CSCI3121 - Computer Organization - Summer 2009

Final Exam

• Outline of marking scheme, text, pre-requisit etc..

Assignments

• Assignment 1 - due May 18 in class.
• Assignment 2 - due June 10 in class. (you will also need a Pipe Timing Diagram
• Assignment 3 due June 17 in class
• Assignment 4 - Speculative, Out-of-order execution (due July 13 in class).
  • Timing Diagrams
• Assignment 5 - due TBA in class.

Presentations

• Presentation groups
• Group #1 - Presenting TBA
• Group #2 - Presenting TBA.

Benchmarking

• Benchmarking Slides
• Case Study - Notes on SPEC CPU2000 comparison between ALPHA architectures.
• Example Problems

Instruction Set Architectures

• ISA Profiling
• Example Problems

Instruction Level Parallelizm: An introduction

• Basic 5-stage ILP
• Data Hazards
• Control hazards
• Pipeline timing example
• Branch Target Buffers and Control Hazards
• Summary of basic instruction level pipe
• Dynamic Scheduling in hardware
  • Timing diagram and Resourvation Station operation
  • Conclusion
• Multi-issue or Superscalar architecture: reducing CPI below unity
  • Timing diagrams
• Speculative Execution
  • Timeing diagrams
• Thread-Level Parallelism

Memory Hierarchy

• Basic Memory Hierarhcy
• Miss Rate Reduction
• Miss Penalty and Hit Rate
• Virtual Memory

IO and Storage

• Buses and Bus hierarchy
• IO, reliability, and performance
• IO Design example